Flash memory cells are provided that include a first source/drain region and
a second source/drain region separated by a channel region. A first gate opposes.
A first gate insulator separates the first gate from the channel. The first gate
insulator includes a graded composition gate insulator. A second gate is separated
from the first gate insulator by a second gate insulator. The above memory cells
produce gate insulators with less charging at the interface between composite insulator
layers and provide gate insulators with low surface state densities. The memory
cells substantially reduce large barrier heights or energy problems by using dielectrics
having suitably, adjustably lower barrier heights in contact with the polysilicon
floating gate. Such adjustable barrier heights of controlled thicknesses can be
formed using a silicon suboxide and a silicon oxycarbide dielectrics prepared according
to the process as described herein.