A ferroelectric-type nonvolatile semiconductor memory comprising a bit line BL,
a transistor for selection TR, a memory unit MU composed of memory cells MCM
that are M in number (M2), and plate lines PLM that are M in
number, in which each memory cell comprises a first electrode 21, a ferroelectric
layer 22 and a second electrode 23; in the memory unit MU, the first
electrodes 21 of the memory cells MCM are in common, and said
common first electrode 21 is connected to the bit line BL through the transistor
for selection TR; in the memory unit MU, the second electrode 23 of the
m-th-place memory cell is connected to the m-th-place plate line PLm;
and said ferroelectric-type nonvolatile semiconductor memory further comprises
a circuit TRS for short-circuiting the plate lines PLM that
are M in number and the common first electrode 21.
