In preferred embodiments, a compact a hybrid integrated circuit device 1 can be provided. A conductive pattern 12 is formed on the top surface of a circuit substrate 10, on the top surface of which an insulating layer 11 has been provided. Conductive pattern 12 is formed over the entirety of the top surface of the circuit substrate. Specifically, conductive pattern 12 is also formed at parts within 2 mm from the peripheral ends of circuit substrate 10. Also, a heat sink 13A or other circuit element 13 with some height can be positioned near a peripheral end part of circuit substrate 10. By arranging hybrid integrated circuit device 1, the degree of integration of hybrid integrated circuit is improved. Thus, in a case where the same circuit as a prior-art example is formed, the size of the entire hybrid integrated circuit device can be made small.