A method for forming an application specific integrated circuit, comprises receiving a circuit design for the application specific integrated circuit from a designer; performing an initial place and route layout of the circuit design which leaves a group of buffer modules unused, based upon a partially predesigned integrated circuit, in which the partially predesigned integrated circuit includes a plurality of logic modules and a plurality of buffer modules uniformly distributed amongst the logic modules; evaluating load and timing characteristics for the initial place and route layout of the circuit design; and integrating buffer modules from the group of unused buffer modules into the circuit design, based on the load and timing characteristics evaluated. A gate array, for forming the application specific integrated circuit in accordance with the invention includes a matrix of function blocks capable of being configured to implement combinational, sequential, and memory modes of operation, as well as providing tri-state drivers and buffers in useful numbers.