A method for use by a placement and routing tool automatically selects positions for all n I/O buffers of an IC from among a set of m available legal positions for such buffers within an IC layout so as to best meet a set of criteria affected by I/O buffer placement. The method initially establishes a weighted cost function ci,j quantifying a cost, relative to that set of criteria, of assigning the ith I/O buffer to the jth legal position. The weighted cost function is then evaluated with respect to each possible combination of i and j to produce an mn cost data matrix indicating all costs associated with all of the mn possible I/O buffer placements. The cost data matrix is then analyzed to produce a placement plan assigning each I/O buffer to a separate legal position in a way that minimizes a total cost of the buffer placement with respect to the set of criteria. The method may also be used to assign I/O pads among a set of legal pad positions.

 
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< Multi-resolution Viterbi decoding technique

< Semiconductor integrated device

> Constrained optimization with linear constraints to remove overlap among cells of an integrated circuit

> Tool suite for the rapid development of advanced standard cell libraries employing the connection properties of nets to identify potential pin placements

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