A method evaluates signal trace discontinuities in an electronic design of the type having one or more traces. The method includes the steps of formulating one or more trace discontinuity rules, processing the electronic design to determine whether the traces violate the trace discontinuity rules, and generating an indicator (e.g., a DRC) associated with the electronic design to identify violated trace discontinuity rules. Each level, each signal net, or a group of signal nets may be evaluated, for example, to ensure compliance with the trace discontinuity rules.

 
Web www.patentalert.com

< User interface for stylus-based user input

< Ink gestures

> Small memory footprint system and method for separating applications within a single virtual machine

> Compiler apparatus and method for optimizing loops in a computer program

~ 00203