In a bottom gate type semiconductor device made of a semiconductor layer with crystal structure, source/drain regions are constructed by a lamination layer structure including a first conductive layer (n+ layer), a second conductive layer (n-; layer) having resistance higher than the first conductive layer, and an intrinsic or substantially intrinsic semiconductor layer (i layer). At this time, the n-; layer acts as LDD region, and the i layer acts as an offset region is a film thickness direction.

 
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