A detector detects at least one kind of dependence in address between instructions executed by at least a processor, the detector being adopted to detect a possibility of presence of the at least one kind of dependence, wherein if the at least one kind of dependence is present in fact, then the detector detects a possibility of presence of the at least one kind of dependence, and if the at least one kind of dependence is not present in fact, then the detector may detect a pseudo presence of the at least one kind of dependence. The detector has an execution history storing unit with a plurality of entries and an address converter for converting an address of a memory access instruction into an entry number, where different addresses may be converted into entry numbers that are the same.

 
Web www.patentalert.com

< Method and system for translation lookaside buffer coherence in multiprocessor systems

< Method for bus capacitance reduction

> Method and apparatus for merging contiguous like commands

> Pop-compare micro instruction for repeat string operations

~ 00200