A memory is described which has memory cells that store data using hot electron
injection. The data is erased through electron tunneling. The memory cells are
described as floating gate transistors wherein the floating gate is fabricated
using a conductive layer of nanocrystalline silicon particles. Each nanocrystalline
silicon particle has a diameter of about 10 to 100 . The nanocrystalline
silicon particles are in contact such that a charge stored on the floating gate
is shared between the particles. The floating gate has a reduced electron affinity
to allow for data erase operations using lower voltages.
