Photomask for reducing power supply voltage fluctuations in an integrated circuit and integrated circuit manufactured with the same

   
   

A photomask for reducing power supply voltage fluctuations in an integrated circuit and integrated circuit manufactured by the same are disclosed. The photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a pattern in a mask layout file to identify a region in the pattern to add one or more decoupling capacitors. Once the region is identified, a feature located in the identified region is moved based on a design rule from a first position to a second position in the mask layout file to create a space in the identified region. The decoupling capacitors are placed in the space in the identified region.

 
Web www.patentalert.com

< Dynamic tilt limiter for fluid dynamic bearings

< Method and apparatus for measuring rotor unbalance

> Developing device for suppressing variations in bulk density of developer, and an image forming apparatus including the developing device

> Crossover fault classification for power lines with parallel circuits

~ 00186