System domain targeted, configurable interconnection

   
   

A method and apparatus for reconfiguring a computing system on a system domain-by-system domain basis are disclosed. In one aspect of the present invention, the apparatus is a computing system comprises a plurality of system domains, a centerplane interconnecting the system domains, and a system controller. The system controller is capable of detecting a condition triggering a reconfiguration and reconfiguring a signal path affected by the condition from a first mode to a second mode. In a second aspect of the present invention, the method for reconfiguring a signal path in a computing system including a plurality of system domains comprises: detecting a condition triggering a reconfiguration of the computing system; reconfiguring a signal path affected by the condition from a first mode to a second mode responsive to detecting the condition; leaving the unaffected system domains configured in the first mode; and operating the affected system domains in the second mode and the unaffected system domains in the first mode.

 
Web www.patentalert.com

< VLSI chip test power reduction

< Built-in self-testing for double data rate input/output

> Extension of USB functionality through shadowing of a remote USB host controller

> I/O stress test

~ 00182