The purpose of the present invention is to provide a reliable semiconductor device
comprising TFTs having a large area integrated circuit with low wiring resistance.
One of the features of the present invention is that an LDD region including a
region which overlaps with a gate electrode and a region which does not overlap
with the gate electrode is provided in one TFT. Another feature of the present
invention is that gate electrode comprises a first conductive layer and a second
conductive layer and portion of the gate wiring has a clad structure comprising
the first conductive layer and the second conductive layer with a low resistance
layer interposed therebetween.
