An integrated circuit, a client computer system, and a method for using a watchdog
timer as a check before changing the system state of a computer system. The integrated
circuit includes a first bus interface logic for coupling to a first external bus,
a watchdog timer, and logic configured to receive a request for a system reset.
The watchdog timer is coupled to receive a reset input upon a predetermined change
in a system state. The watchdog timer is further configured to provide an indication
in response to an expiration of the watchdog timer. The logic is configured to
query the watchdog timer for the expiration of the watchdog timer in response to
receiving the request for the system reset.
