The present invention provides a method for operating a TAP controller
having a first input terminal (Etms) for inputting a logic test mode
selection signal (tms) and a second input terminal (Etrst) for inputting a
logic reset signal (trst); the TAP controller being configured in such a
way that it is in a test mode if the test mode selection signal (tms) has
a first logic state ("0"), and it is in no test mode if the test mode
selection signal (tms) has a second logic state ("1"), that it can be
reset asynchronously by single application of the logic reset signal
(trst) from the first logic state ("0"); the method having the following
steps: provision of an external logic reset signal (reset_n): formation of
a logic ORing of the external logic reset signal (reset_n) and the
inverted logic test mode selection signal (tms) for the generation of the
logic reset signal (trst); and application of the logic reset signal
(trst) generated by the logic ORing to the second input terminal (Etrst).
The invention provides a corresponding TAP controller.
