A semiconductor memory device comprises memory cell array, a sense amp, and
a reference voltage generator.
The reference voltage generator includes a reference cell unit containing a
reference cell to flow a reference current and a first current source load
to supply a current to the reference cell; a reference transistor unit
containing a reference transistor to flow a current reflecting the
reference current and a second current source load to supply a current to
the reference transistor; a control amp for negative feedback control of
the reference transistor; a current source transistor; and a third current
source load connected to a reference sense line.
