Indium phosphide heterojunction bipolar transistor layer structure and method of making the same

An expitaxial layer structure that achieves reliable, high speed, and low noise device performance in indium phosphide (InP) based heterojunction bipolar transistors (HBTs) for high data rate receivers and optoelectronic integrated circuits (OEIC). The layer consists of an n+ InGaAs subcollector, an n+ InP subcollector, an unintentionally doped InGaAs collector, a carbon-doped base, an n-type InP emitter, an n-type InGaAs etch-stop layer, an n-type InP emitter, and anInGaAS cap layer.