Design method of semiconductor device

   
   

A semiconductor device design method useful for the design of microprocessor, ASIC, and high-speed high-performance LSI is intended to enhance the accuracy of delay calculation and crosstalk noise calculation, and enhance the accuracy of assessment of delay variation caused by crosstalk and checking of malfunctioning caused by crosstalk. The method calculates the delay by using the total capacitance in consideration of the actual load after the layout and wiring, carries out the layout, wiring and modification of wiring repeatedly until targeted in-cycle transfer becomes attainable, calculates the delay by using the total capacitance in consideration of the actual load and crosstalk, carries out the modification of wiring repeatedly until targeted in-cycle transfer becomes attainable, calculates the crosstalk noise by using the total capacitance and coupling capacitance in consideration of the actual load, carries out the modification of wiring repeatedly until malfunctioning subsides, and uses data after the final layout and wiring for mask data.

 
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