A method and apparatus for detecting, enabling and disabling deadlock
errors, and recording deadlock information in the error logs of a data
processing system even after a power-on reset. One embodiment of the
invention involves a method for indicating a deadlock error in a data
processing system capable of having a deadlock error. The method includes
indicating that an error is a deadlock error, providing an input signal to
set a deadlock error enable circuit having an output signal indicating
that the deadlock error will cause a deadlock reset signal to be asserted,
logically ORing deadlock error signals to produce a deadlock output; and
logically ANDing the deadlock output and the output signal of the deadlock
error enable circuit to produce the deadlock reset signal. A second
embodiment of the invention involves a data processing system or an error
log system, capable of having a deadlock error selected from several
deadlock errors. The data processing system or error log system includes a
deadlock error enable circuit having an output signal indicating that the
deadlock error will cause a deadlock reset signal to be asserted, a first
combinational logic circuit to logically OR the deadlock signals, having a
deadlock output, and a second combinational logic circuit to logically AND
the deadlock output of the first combinational logic circuit and the
output signal of the deadlock error enable circuit, to produce the
deadlock reset signal.