The swapping function of input values to output values is performed through a pseudo content addressable memory which provides output values corresponding to a number E of n-bit input values, with E=2.sup.p -1. The pseudo content addressable memory is made of a plurality of cascaded random address memories 20 having at least a 2.sup.d addressing capability, with d higher than p. A control logic circuit is provided to store into each random access memory p-bits pointers, with each pointer being different from the others and randomly assigned to an input value. In order to find an output value corresponding to an input value, the control logic circuit sequentially address and reads the cascaded random access memories, the first memory being addressed with a part including a number n1 of bits of the input value, and each one of the next memories being addressed with the pointer read from the preceding memory concatenated with another part ni of bits of the input value, with ni equal to or lower than n-n1. The output value is found as a result of the addressing of the last memory.