In a data processing system that includes a safe store buffer containing
valid copies of all registers, processor transitions from a higher
security routine to a lower security routine can be performed in fewer
cycles by utilizing a plurality of sets of registers maintained in a
round-robin system. Whenever a transition is made to a higher security
environment, a switch is made to a different set of registers. Then, when
a transition is made back to the lower security environment, a switch is
made back to the previous set of registers. Writes to memory copies of
registers are detected, and only those registers whose memory copies have
been modified are restored from the memory copy.